ToolFusion / Capacitor Bank / Engineering Tools

Project Tool: Capacitor Bank Acceptance Testing and Commissioning

Specification & Integration Verification

F6 Composition for Capacitor Bank Acceptance Testing and Commissioning

● Not Golden Verified ● Project Trust Verified Runnable: 11 / 12 steps

VERIFIED SCOPE

○ Compute max-min capacitance ratio CALCULATION Partial

○ Verify capacitance imbalance against IEEE 18-2022 limit PASS / FAIL capable Runnable

○ Apply IEEE 43 temperature correction factor CALCULATION Runnable

○ Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1 PASS / FAIL capable Runnable

○ Calculate percentage tuning deviation CALCULATION Runnable

○ Assess tuning deviation against IEEE 519-2022 ±2% tolerance PASS / FAIL capable Runnable

○ Calculate fuse-relay time margin CALCULATION Runnable

○ Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020 PASS / FAIL capable Runnable

○ Calculate pre- and post-energization power factors CALCULATION Runnable

○ Calculate post-energization power factor CALCULATION Runnable

○ Compute absolute power factor improvement CALCULATION Runnable

○ Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min PASS / FAIL capable Runnable

⚠ This tool does not currently verify IEEE Clause Mapping and Mandatory Requirement V..., Harmonic Filter Tuning Frequency and Q-Factor E..., Nameplate VAR Output Tolerance Verification wit....

PROJECT INPUTS

Runnable deterministic steps: 11 / 12. Enter the project conditions used by this verification workflow. Prefilled values (33/35 inputs) are demonstration inputs, not recommended design values.

01Step 1: Compute max-min capacitance ratioFormula

Capacitance Phase A

Capacitance Phase B

Capacitance Phase C

Max EXAMPLE INPUT REQUIRED

C A

C B

C C

Min EXAMPLE INPUT REQUIRED

Quantify worst-case phase imbalance to assess risk of overvoltage, fuse misoperation, and resonant amplification.

02Step 2: Verify capacitance imbalance against IEEE 18-2022 limitValidation Rule

Capacitance Imbalance Ratio

dimensionless

Ensure compliance with mandatory safety and reliability threshold for ungrounded wye banks per IEEE 18-2022 Section 7...

03Step 3: Apply IEEE 43 temperature correction factorFormula

Measured Insulation Resistance

MΩ

Ambient Temperature

°C

Normalize insulation resistance to standard temperature for consistent comparison across test conditions and historic...

04Step 4: Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1Validation Rule

Corrected Insulation Resistance

MΩ

Confirm dielectric integrity meets minimum safety threshold for medium-voltage capacitor banks (≥1 kV).

05Step 5: Calculate percentage tuning deviationFormula

Measured Resonant Frequency

Nominal Tuning Frequency

F R

F Nom

Quantify accuracy of physical filter implementation versus design intent to prevent mistuning-induced resonance or in...

06Step 6: Assess tuning deviation against IEEE 519-2022 ±2% toleranceValidation Rule

Tuning Deviation Percent

Ensure passive filter remains effective and safe under expected component tolerances and aging effects.

07Step 7: Calculate fuse-relay time marginFormula

Fuse Melting Time At 200 Percent

Relay Instantaneous Pickup Time

T Fuse

T Relay

Ensure downstream protection devices operate selectively to isolate faults without unnecessary upstream tripping.

08Step 8: Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020Validation Rule

Coordination Time Margin

Guarantee selective coordination between fuse and relay to avoid nuisance trips and maintain system continuity.

09Step 9: Calculate pre- and post-energization power factorsFormula

Real Power Pre Energization

Apparent Power Pre Energization

kVA

P Pre

S Pre

kVA

Quantify baseline and corrected system power factor to evaluate correction efficacy.

10Step 10: Calculate post-energization power factorFormula

Real Power Post Energization

Apparent Power Post Energization

kVA

P Post

S Post

kVA

Determine actual system power factor after capacitor bank is online.

11Step 11: Compute absolute power factor improvementFormula

Power Factor Post

dimensionless

Power Factor Pre

dimensionless

PF Post

dimensionless

PF Pre

dimensionless

Measure net benefit delivered by capacitor bank relative to contractual KPI.

12Step 12: Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_MinValidation Rule

Power Factor Improvement

dimensionless

Validate contractual performance guarantee for power factor correction.

⚠ Runnable deterministic steps: 11 / 12. Steps marked "Input Required" or "Example Input Required" need user-provided engineering values before calculation.

Deterministic calculation · Results become stale when engineering inputs change.

ToolFusion Engineering Network

Access thousands of engineering calculators, standards, and design tools. Join the ToolFusion network for comprehensive engineering resources.

Explore ToolFusion

ENGINEERING EVIDENCE

Golden Coverage0 / 12

Project Trust11 / 11 PASS

RuntimeDeterministic

Components0 small tools, 12 steps

SCOPE & LIMITATIONS

NOT CURRENTLY VERIFIED

○ IEEE Clause Mapping and Mandatory Requirement Validation

○ Harmonic Filter Tuning Frequency and Q-Factor Extraction

○ Nameplate VAR Output Tolerance Verification with Voltage Scaling

These capabilities are outside the current verified workflow.

HOW THIS VERIFICATION WORKS

Step 1: Compute max-min capacitance ratio — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 2: Verify capacitance imbalance against IEEE 18-2022 limit — compares engineering inputs against deterministic thresholds and produces a PASS or FAIL decision.
Step 3: Apply IEEE 43 temperature correction factor — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 4: Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1 — compares engineering inputs against deterministic thresholds and produces a PASS or FAIL decision.
Step 5: Calculate percentage tuning deviation — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 6: Assess tuning deviation against IEEE 519-2022 ±2% tolerance — compares engineering inputs against deterministic thresholds and produces a PASS or FAIL decision.
Step 7: Calculate fuse-relay time margin — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 8: Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020 — compares engineering inputs against deterministic thresholds and produces a PASS or FAIL decision.
Step 9: Calculate pre- and post-energization power factors — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 10: Calculate post-energization power factor — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 11: Compute absolute power factor improvement — performs a deterministic calculation from the provided inputs. No acceptance criterion is applied; the result is CALCULATED only.
Step 12: Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min — compares engineering inputs against deterministic thresholds and produces a PASS or FAIL decision.

This tool coordinates 5 validation steps and 7 calculation steps. The overall engineering decision uses ALL_REQUIRED_VALIDATION_PASS aggregation: only validation steps contribute to the pass/fail outcome; calculation steps produce data only.

METHODS & EQUATIONS

All formulas are resolved from canonical runtime definitions and executed deterministically by the client-side engine.

Step 1: Compute max-min capacitance ratio

Formulamax(C_a,C_b,C_c)/min(C_a,C_b,C_c)

Step 2: Verify capacitance imbalance against IEEE 18-2022 limit

Validation Rule

capacitance_imbalance_ratio <= 1.033 [engineering_standard:IEEE_18-2022_Section_7.4.2]

Step 3: Apply IEEE 43 temperature correction factor

Formulameasured_insulation_resistance * 1.5^((40 - ambient_temperature)/10)

Step 4: Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1

Validation Rule

corrected_insulation_resistance >= 1000 [engineering_standard:IEEE_18-2022_Section_5.5.1]

Step 5: Calculate percentage tuning deviation

Formulaabs((f_r-f_nom)/f_nom)*100

Step 6: Assess tuning deviation against IEEE 519-2022 ±2% tolerance

Validation Rule

tuning_deviation_percent <= 2 [engineering_standard:IEEE_519-2022_Annex_D]

Step 7: Calculate fuse-relay time margin

Formulat_fuse-t_relay

Step 8: Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020

Validation Rule

coordination_time_margin >= 0.1 [engineering_standard:IEEE_C37.90.1-2020_Section_6.3.2]

Step 9: Calculate pre- and post-energization power factors

FormulaP_pre/S_pre

Step 10: Calculate post-energization power factor

FormulaP_post/S_post

Step 11: Compute absolute power factor improvement

FormulaPF_post-PF_pre

Step 12: Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min

Validation Rule

power_factor_improvement >= 0.05 [customer_requirement:Spec_PF_Gain_Min]

UNDERSTANDING THE RESULTS

PASS: A proven validation criterion passed. The engineering input satisfies the deterministic threshold.
FAIL: A proven validation criterion failed. The engineering input does not satisfy the deterministic threshold.
CALCULATED: A deterministic calculation completed, but no acceptance criterion exists for this step. CALCULATED does NOT mean PASS.
RESULT NOT VALID: Runtime executed but engineering validity requirements were not met.
INCOMPLETE: Required inputs or workflow steps are incomplete.

The overall decision reflects only validation steps. Calculation steps produce numerical results without pass/fail claims.

WHEN TO USE THIS TOOL

When deterministic Capacitor Bank engineering verification is needed for project-specific conditions.
For calculation of Compute max-min capacitance ratio (Step 1).
For validation of Verify capacitance imbalance against IEEE 18-2022 limit (Step 2).
For calculation of Apply IEEE 43 temperature correction factor (Step 3).
For validation of Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1 (Step 4).
For calculation of Calculate percentage tuning deviation (Step 5).
For validation of Assess tuning deviation against IEEE 519-2022 ±2% tolerance (Step 6).
For calculation of Calculate fuse-relay time margin (Step 7).
For validation of Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020 (Step 8).
For calculation of Calculate pre- and post-energization power factors (Step 9).
For calculation of Calculate post-energization power factor (Step 10).
For calculation of Compute absolute power factor improvement (Step 11).
For validation of Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min (Step 12).
For deterministic pre-checks before formal engineering review or submission.

When NOT to use this tool: This tool does not replace laboratory testing, formal engineering analysis by a licensed professional, or code-compliance certification. It performs deterministic threshold comparison and calculation only.

ENGINEERING FAQ

What does this verification tool check?

This tool performs 12 deterministic engineering steps: (1) Compute max-min capacitance ratio, (2) Verify capacitance imbalance against IEEE 18-2022 limit, (3) Apply IEEE 43 temperature correction factor, (4) Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1, (5) Calculate percentage tuning deviation, (6) Assess tuning deviation against IEEE 519-2022 ±2% tolerance, (7) Calculate fuse-relay time margin, (8) Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020, (9) Calculate pre- and post-energization power factors, (10) Calculate post-energization power factor, (11) Compute absolute power factor improvement, (12) Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min.

What does a PASS result mean?

A PASS result means the validation step's deterministic threshold comparison was satisfied. It does not constitute laboratory certification or code compliance.

What does a CALCULATED result mean?

A CALCULATED result means the deterministic calculation completed, but no acceptance criterion is applied to this step. CALCULATED does NOT mean PASS.

What is not currently verified by this workflow?

Capabilities not currently verified include: IEEE Clause Mapping and Mandatory Requirement Validation, Harmonic Filter Tuning Frequency and Q-Factor Extraction, Nameplate VAR Output Tolerance Verification with Voltage Scaling.

How many steps are golden verified?

0 out of 12 steps have been verified with deterministic golden test cases.

COMPONENT TOOLS

This workflow currently contains no bound executable Small Tools. Steps are defined by engineering methods and reference materials.

CalculationWorkflow StepCapacitance imbalance ratio calculation per IEEE 18-2022 Section 7.4.2

ValidationWorkflow StepCapacitance imbalance ratio calculation per IEEE 18-2022 Section 7.4.2

CalculationWorkflow StepInsulation resistance temperature correction to 40°C per IEEE 43-2013

ValidationWorkflow StepInsulation resistance temperature correction to 40°C per IEEE 43-2013

CalculationWorkflow StepHarmonic filter tuning frequency deviation assessment

ValidationWorkflow StepHarmonic filter tuning frequency deviation assessment

CalculationWorkflow StepProtection coordination time margin verification for capacitor bank fusing

ValidationWorkflow StepProtection coordination time margin verification for capacitor bank fusing

CalculationWorkflow StepPost-energization power factor correction efficacy calculation

ValidationWorkflow StepPost-energization power factor correction efficacy calculation

RELATED ENGINEERING WORKFLOWS

Verification Steps

Step 1: Compute max-min capacitance ratio (CALC)

Step 2: Verify capacitance imbalance against IEEE 18-2022 limit (PASS/FAIL)

Step 3: Apply IEEE 43 temperature correction factor (CALC)

Step 4: Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1 (PASS/FAIL)

Step 5: Calculate percentage tuning deviation (CALC)

Step 6: Assess tuning deviation against IEEE 519-2022 ±2% tolerance (PASS/FAIL)

Step 7: Calculate fuse-relay time margin (CALC)

Step 8: Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020 (PASS/FAIL)

Step 9: Calculate pre- and post-energization power factors (CALC)

Step 10: Calculate post-energization power factor (CALC)

Step 11: Compute absolute power factor improvement (CALC)

Step 12: Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min (PASS/FAIL)

Project Tool: Capacitor Bank Acceptance Testing and Commissioning

ToolFusion Engineering Network

Engineering Workflow

Detailed Engineering Results

ENGINEERING EVIDENCE

SCOPE & LIMITATIONS

Engineering Verification Summary

HOW THIS VERIFICATION WORKS

METHODS & EQUATIONS

Step 1: Compute max-min capacitance ratio

Step 2: Verify capacitance imbalance against IEEE 18-2022 limit

Step 3: Apply IEEE 43 temperature correction factor

Step 4: Verify corrected IR ≥ 1000 MΩ per IEEE 18-2022 Section 5.5.1

Step 5: Calculate percentage tuning deviation

Step 6: Assess tuning deviation against IEEE 519-2022 ±2% tolerance

Step 7: Calculate fuse-relay time margin

Step 8: Verify coordination margin ≥ 0.1 s per IEEE C37.90.1-2020

Step 9: Calculate pre- and post-energization power factors

Step 10: Calculate post-energization power factor

Step 11: Compute absolute power factor improvement

Step 12: Verify ΔPF ≥ 0.05 per customer_requirement:Spec_PF_Gain_Min

UNDERSTANDING THE RESULTS

WHEN TO USE THIS TOOL

ENGINEERING FAQ

COMPONENT TOOLS

RELATED ENGINEERING WORKFLOWS